Copyright © 2010 by Wayne Stegall
Updated July 21, 2010. See Document History at end for details.
Simple DC Servos
The hope of direct coupling some desireable audio circuits may be
challenged by high DC offset, perhaps due to compromises made to gain
some other desireable outcome. Adding or increasing DC feedback
is necessary here. Second order servos are often used because a
second passive pole is desired to decouple the typical op-amp
integrator from the signal path. Second order servos, however,
require carefull juggling of gain and phase shift factors to prevent
subsonic oscillation. A simple integrator stage would do, but
would find the connection of the op-amp output into the signal path
disagreeable. Here I suggest adding to the integrator a zero
matching and cancelling the pole of the second stage to create a two
stage first order
servo. With a constant servo phase shift of -90°, design can
without worry of oscillation at all.
response of integrator with zero (red
plot) adds to that of the second stage lowpass pole (green plot) to
create a first order integrator response (connecting black plot).
stage first order servos.
A disadvantage of this design is that the output signal is present in
full with boosted DC error signal at output of the integrator awaiting
suppression by second stage. Biasing of the servo must allow
headroom for AC component.
The final highpass pole will be at the frequency where |βservo
|. β is feedback factor or gain of feedback
To prove this assertion and give you useful servo equations, include
both feedback factors in the closed-loop feedback gain equation:
If the loop gain AV-OL
β >> 1 (usually met, except in
low gain circuits) then the ideal gain equation becomes:
At the servo highpass pole, |βservo
| but their phases are 0º and -90º
respectively. The gain now becomes:
βglobal - jβservo
βglobal(1 - j)
|, (j here is a vector number with
a 90º degree direction)
1/(1 - j) in polar terms is 0.7071<45º the -3dB response of a
first order highpass filter.
These equations ideally include the high-frequency effects that require
compensation calculations, but here are used only as they affect servo
The servo feedback factor is inversely proportional to frequency.
ω = 2πf = 1/T and ωpz
the frequency of the integrator zero and of the second stage pole:
| = βservo0
represents servo gain at ωpz
and is unity
for the non-inverting circuit. For the inverting circuit
You will have to multiply into βservo0
any other gain
factors you may add. A likely example is the addition of a
voltage divider before the integrator in a power amp where the direct
output voltage would overdrive the op amp.
Exact calculations depend on the particular setup. Refer to the
example below for details.
As an example I will add a non-inverting servo of this type to the
voltage feedback amplifier of Musical
. It will function in this circuit to
automatically bias the amplifier as well as reduce offset. Offset
will not be as low as it would be if servo was not acting to bias the
ciruit as well, but it should still be good. As a desirable side
effect, driving the circuit bias will put the op-amp in class A
operation, reducing the urge to use separate power supplies.
The following circuit was unstable without compensation according to
modeling. With dominant
pole compensation of pole frequency
>= 20kHz, it showed stable results. I tried poles
approaching 100kHz with good results also. Its asymmetrical
design should ensure even and odd harmonics for those with that
The design proceeds as follows:
- Make transistor choices. (I chose LSK170A JFETs and 2N3906
PNPs for these analyses, other choices would work well too.)
- Decide power supply voltages.
- Choose RL (and R1 and R2 if
used) for desired output impedance (in this case 1kΩ).
- Choose RBE to set bias through Q1.
Check Q1 datasheet for a proper value here.
- Choose CC for desired compensation pole
frequency. (Ordinarily this involves examining the loop gain (AV-OLβglobal)
show whether our pole chosen for
musical reasons will result in oscillation.)
- Simulate circuit in SPICE with reasonable RS to
power supply (RS = VSS/2ID will do)
adjust compensation if needed.
- Choose servo break frequency of 159.155mHz for even 1sec time
- Choose op-amp. Any will do that will operate on the chosen
supply. High DC gain and low output offset are desired, other
parameters are less critical, bandwidth can be low. The LF411 is often chosen for this sort
- Calculate RS to meet anticipated servo bias (i.e.
- Calculate R2S and R3S to drive desired
from op-amp biased at output at 0V at reasonable current value within
- Calculate feedback factors then calculate actual integrator pole
- From these calculate and choose remaining servo component values.
- Simulate and verify final circuit in SPICE.
Output impedance in calculations is open-loop. Closed loop output
impedance will be reduced by the feedback factor (AOL
on the output can give short
circuit protection where an external cable is driven.
|Figure 3: Simplest
voltage-feedback op-amp with non-inverting
feedback network and DC servo.
3: LSK170A SPICE
|.MODEL LSK170A NJF
+ BETA =
VTO = -0.4025156 LAMBDA
Amplifier Design and Compensation Procedure
JFETs and 2N3906
PNPs for these analyses
Choose power supplies as +-15V
For gain of 10, R1
gain formula here is ACL
= 1 + R2
= 15/(100 x 2kΩ) = 75µA.
LSK170A has min IDSS
of 2.6mA, choose iD
= 700mV/(2mA - 75µA) = 363.6363636Ω.
Round up to nearest standard 5% value: RBE
= 25mV/75µA =
is the temperature dependent
characteristic voltage of a PN junction, usually 25-26mV)
= 360Ω ||
333.3333333Ω = 173.0769231Ω
Calculate compensation capacitor for 20kHz dominant pole.
2π x 20kHz x 173.0769231Ω
| = 45.97809467nF
(A+1) = 10pF +
4.5pF(1kΩ/333.3333333Ω + 1) = 28pF (These from 2N3906 datasheet,
by A+1 is the Miller effect)
, because CPOLE
Choose standard value CC
= 700mV/360Ω + 75µA = 2.01944mA
Calculate source output impedance rs
Servo Design Procedure
2 x sqrt(knID)
2 x sqrt(37.8643mA/V2
| = 57.1794Ω
Choose break frequency of 159.155mHz for even 1sec time constant.
Want first stage of servo at 0V DC bias to drive C2S
second stage to -7.5V
-402.516mV + sqrt(2.01944mA/37.8643mA/V2
) = -171.575mV
= 2 x ID
Calculate R terminated to -7.5V:
= (7.5V + |VGS
x 2) = (7.5V + 171.575mV)/4.03889mA = 1.89943kΩ.
Round down to nearest 5%. Choose RS
for 10mA op-amp output:
= 7.5V/10mA = 750Ω
= 7.5V/(10mA + 4.03889mA) = 534.23Ω.
Round up to nearest 5%. Choose R3S
Now calculate to set servo break frequency. Begin by calculating
the feedback factors.
1.8kΩ + 200Ω
| = 0.1
Calculate additional drop in βservo
from that at integrator
zero frequency (now presuming resistive voltage divider drop in second
|1.8kΩ || 560Ω
1.8kΩ || 560Ω + 750Ω
427.119Ω + 750Ω
427.119Ω + 750Ω
| = 362.851m(V/V)
Preliminary SPICE evaluation indicates I underestimated additional drop
(pole frequency was much lower than expected). Proceed now on the
basis of inserting the servo feedback at the Q1
rather than at the end of RS
additional drop due to voltage divider between RS
presuming voltage dividers are close to independent due to scale of
RS || rs
1.8kΩ + 57.1794Ω
| = 30.7883m(V/V)
= 362.851m(V/V) x 30.7883m(V/V) = 11.1716m(V/V)
ω = 2πf = 1/T:
|βglobal = 0.1 = βservo
Calculate servo pole/zero time constant from desired highpass break
2π x 159.155mHz x 0.1
| = 111.716msec
= 1.8kΩ || 750Ω || 560Ω = 272.138Ω
111.716msec/272.138Ω = 410.512µF
Round to nearest standard 5% value: Choose C2S = 430µF
Choose R1S =
and calculate C1S
= 111.716msec/330kΩ = 338.533nF
Round to nearest standard 5% value: Choose C1S = 330nF
Output offset = -13.3143µV
Frequency response: 0.17378Hz - 660.7kHz +0,-3dB (Deviation
of servo pole from chosen 0.159155Hz is negligible)
SNR = 109.875dB
Integrator output bias: -1.33143V (You would want to trim R2S
(and perhaps C2S
) if this value was too
far from 0V)
Fourier analysis for vout @ 1kHz:
No. Harmonics: 10, THD: 0.0296942 %, Gridsize: 200,
Interpolation Degree: 1
circuit of figure 31
1Links to supporting SPICE
models on this
July 20, 2010 Created
July 21, 2010 Elaborated servo equations to better
clarify integrator response.