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Copyright © 2011, Free use of program governed by statement in
About dialog which is repeated below.
Updated June 2, 2012. See Document History
at end for details.
SPICE verified.
In the context of desiring to match or scale FET parameters for the
purpose of distortion cancelation, it becomes desirable to calculate
these parameters. Few would have access to transistor testers for
their high cost. Here I show how these parameters can be
calculated from measurements made with just a power supply and a
multimeter and provide a dedicated calculator to make them.
These calculations are exact for
enhancement MOSFETs. The program makes minor adjustments for
JFET's depletion mode bias range.
Simple Calculations are
based on the idea that the V_{GS} measured with the highest
bias resistor is approximately V_{T}. R_{BIAS}
determining V_{T} would have to be very high compared to any
anticipated circuit bias like 1MΩ. The other measurement would
then determine k_{n} (or KP in SPICE terms).
If V_{GS1} ≈ V_{T} then
(1) 
I_{D2} = 
V_{BIAS}  V_{GS2}
R_{BIAS2} 
(2) 
k_{n} =  I_{D2}
(V_{GS2}  V_{T})^{2} 
TwoPoint Calculations mathematically fit a curve to the data
instead. Three data points are usually required to define a
second order polynomial. Two data points suffice because a
constant preexisting boundary condition satisfies the function of the
third data point. That di/dv = 0 when i = 0 at V_{T}
defines this boundary condition.
If the MOSFET equation
(3) 
I_{D} = k_{n}(V_{GS}  V_{T})^{2} 
is rearranged in the form
(4) 

+ V_{T} = V_{GS} 
A pair of simultaneous nonlinear equations suitable for solving for k_{n} and V_{T} can be written:
(5) 

+ V_{T} = V_{GS1}  
(6) 

+ V_{T} = V_{GS2} 
The following substitutions in the rearranged MOSFET equation
(7)  x_{0} = 


(8)  x_{1} =  V_{T}  
(9)  a_{X0} = 


(10)  a_{X1} =  1 

(11)  a_{X2} =  V_{GSX} 
where X is the data point and equation number, yields solvable
simultaneous linear equations in the form of:
(12) 
a_{10}x_{0} + a_{11}x_{1}_{ = }a_{12} 
(13) 
a_{20}x_{0} + a_{21}x_{1}_{ = }a_{22} 
or in standard matrix form:
(14) 

Continuing with the substitutions in the matrix:
(15) 

By matrix reduction, the matrix is transformed to diagonal format
with the last column containing the results:
(16) 

Because the reduced a_{22} term returns V_{T} in its
final form, it remains only to solve for k_{n} from the reduced
a_{12} term.
(17) 
k_{n} = 
1
a_{12}^{2} 
Based on above calculations, I am offering a simple calculator for
download. It is tested in Windows XP, Windows 98, and under Linux
using Wine (Windows Emulator)^{1}
as well.
I retain copyright. You may freely use this software for
personal, noncommercial, use (that is you cannot offer it for
sale). You may share it with others as long as it is provided to
them complete and unmodified as you get it from this website.
Because this program is free, although it works, I do not guarantee its
operation or application
Download FETCurve 1.2.1.zip (13KB)  
Download FETCurve 1.1.0.zip (12KB)  
Download FETCurve 1.0.0.zip (12KB) 
After download, copy the executable into the desired
directory. You will have to manually create links on the desktop
or the start menu, as you desire.
(These are to serve in place of a program help file)
1. Test Circuit Setup
Enhancement MOSFETs tested must be connected so that V_{BIAS}
drops across the selected bias resistor and V_{GS} in
series. JFETs tested must be connected with selected bias
resistor placed between gate and source and sufficient voltage applied
to the drain to ensure device is biased out of its linear range into
saturation. Depletion MOSFETs can be tested the same as
JFETs. If depletion MOSFETs are tested with enhancement bias,
drain voltage cannot be connected with gate voltage as the enhancement
circuit, but sufficient voltage above gate voltage must be applied to
the drain to ensure device is biased out of its linear range into
saturation. Experimentation may be required to determine the best
R_{BIAS} values. At least use values one above and one
below the operating point of your expected circuit.
Figure
x:
Example
Test
Circuits. Depletion Mode Enhancement Mode NJFET PJFET NMOSFET PMOSFET 
2. Soft ware Operation



Program is now SPICE verified. SPICE verification was held up
by confusion of transconductance factor k_{n} with SPICE
tranconductance bulk factor KP.
(18) 
k_{n} = 
KP
2 
× 
W
L_{eff} 
Previously, SPICE verification did not seem necessary because of
mathematical correctness to textbook MOSFET equation.
SPICE model for
JFET test set.
SPICE model for
enhancement MOSFET test set.
Because I did not want to accidentally restrict the usefulness of
the program, I have not placed any range limits on the inputs to the
program. At some later time I may place thoughtful and modest
input limitations. Until then, the user is responsible to input
wellformed input data. Therefore, there are a few pitfalls to
beware:
Windows 95 may not have the shared Visual C++ 6.0 dlls needed to run this program. If you have any problem that implicates a missing file, mfc42.dll or msvcrt.dll, download here, and copy into the directory with the program or into the windows system directory (c:\windows\system\ or c:\windows\system32\ whichever contains system dlls).

^{1}Specifically, Wine
version 1.2.2 under Kubuntu 10.10 Maverick Meerkat. You
will
have
to
copy
mfc42.dll
and/or
mfc42u.dll
to
~/.wine/drive_c/windows/system32 directory for proper operation.
Document History
June 26, 2011 Created.
June 26, 2011 Added section on software input limitations
specifying some data pitfalls, made minor improvements, and clarified a
wordy sentence.
May 31, 2012 Added SPICE verification. Updated program to
version 1.1.0 to flag alias error and to show k_{n} for
transconductance factor to avoid confusion with SPICE parameter KP.
June 2, 2012 Updated program to version 1.2.0 adding input
checking for numeric entries. Immediatedly released version 1.2.1
to allow negative number entry.