* passive parallel riaa equaliztion * pz analysis does not converge for this circuit, * preequalize with inverse RIAA for flat ac plot to 50khz. v1 vsigin 0 dc 0 ac 1 sin 0 1.414213562V 1kHz * x1 vsigin vin 0 invriaa r1 vsigin vout 22.7902k r2 vout r2toc1 3.28066k c1 r2toc1 0 96.9317n r3 vout r3toc2 100 c2 r3toc2 0 31.8n .include ./invriaa2.txt .end .control pz vsigin 0 vout 0 vol pz echo pole and zero frequencies from pole/zero analysis print pole/2/pi zero/2/pi ac dec 25 10Hz 300kHz setplot ac1 plot vdb(vout) .endc